How do I start selecting a Firstack gate driver?

Begin with the module: fix the voltage class and the module package, then set the drive power and peak current from the gate charge and switching frequency. Finally choose a driver core for customisation, a plug-and-play driver for a matched package, or a solution for a complex topology. Those four decisions narrow the range quickly.

Driver core, plug-and-play driver or solution: which should I choose?

Choose a driver core when you want to build a custom driver around a proven digital heart, a plug-and-play driver when a matched module package is available and you want fast integration, and a driver solution when the topology is multi-level or press-pack. The decision is customisation versus integration.

How do I match the drive power to my module?

Estimate the module gate charge and multiply by the switching frequency to get the average drive current, then allow margin for the peak current. A larger module with a high gate charge needs more drive power than a small one. Our FAE team can confirm the drive power for your module.

What selection mistakes should I avoid?

The usual mistakes are undersizing the drive power, ignoring the isolation class and choosing an interface that does not suit the environment. Each adds risk without benefit, and a driver fault often damages the module. Validate the choice on the bench before committing the BOM.

How do I choose the gate resistors for a Firstack driver?

Start from the module datasheet recommendation, then tune on the bench: measure the collector overshoot at turn-off and the EMI spectrum at the switching frequency. Increase the resistance if the overshoot approaches the blocking voltage, and decrease it if switching loss dominates the thermal budget. Separate turn-on and turn-off resistors give the best balance.

When should I use soft shutdown?

Use soft shutdown whenever a short-circuit or overcurrent can occur. During a fault, turning the IGBT off as fast as normal produces a large di/dt and a voltage spike that can destroy the device. Soft shutdown reduces the gate voltage slowly so the fault current falls without an overvoltage spike. Our FAE team can explain the fault sequence.

How does active clamping protect the module?

Active clamping senses the collector voltage and, through a controlled current source, keeps the gate partly on to limit the turn-off spike within a safe range. At high voltage the spike grows with the bus and the loop inductance, so clamping becomes essential. Measure the spike at the module terminals, not the bus.

How do I set the dead time?

Set the dead time above the worst-case turn-off time of the switch plus the driver propagation delay, with margin, so both switches in a leg never conduct together. Too little dead time risks shoot-through; too much distorts the output waveform. Verify the dead time on the bench at the operating temperature.

My driver trips on short circuit at startup. Where do I start?

Check the module and the power wiring for a genuine fault first, then verify the short-circuit detection threshold and the gate resistors. A trip at startup is usually a real fault or a wiring issue rather than a thermal one. Measure the collector current and voltage during the trip.

Why is my gate waveform ringing?

Ringing is parasitic oscillation between the gate capacitance and gate-loop inductance. Shorten the gate loop, increase the gate resistance in small steps, or add a ferrite bead close to the package. Keep ringing below about 20 percent of the drive voltage.

How do I stop false turn-on in a half bridge?

Fast dv/dt couples through Miller capacitance and lifts the off-state gate. Use a negative gate rail, a lower-impedance pull-down, or a lower off-transition gate resistance, and measure the off-state gate during a switching event. If the spike crosses threshold, add the negative rail.

The driver loses power on a 3-level converter. Why?

On a multi-level converter the upper driver's DC/DC supply can sag or the fault sequencing can mis-time. Check the isolated supply loading, verify the fault sequence and confirm the NTC detection wiring for each module. Request a 3-level driver review.

What makes a driver SiC-ready?

A SiC-ready driver offers configurable gate resistor positions, tight timing and a short gate loop, because SiC switches fast and amplifies ringing if the layout is loose. It also needs a protection set tuned for the fast transitions of wide-bandgap modules. The main design care point is gate-loop layout.

Can one driver serve both IGBT and SiC modules?

Yes. A digital driver with configurable gate resistors and protection can drive both, which simplifies the bill of materials across a product family. The gate resistor values and the protection thresholds are set per module, but the hardware is shared. It reduces qualification effort across a platform.

How should I size cooling for a SiC module with these drivers?

Estimate conduction loss from the on-resistance hot value at your junction temperature, add the switching loss at your frequency, and verify the thermal path from junction to ambient. Do not size cooling from the 25 C figure. Our FAE team can run the loss estimate for you.

Can I get samples to evaluate?

Yes. We provide samples of Firstack SiC-ready drivers for your own efficiency and thermal testing, with documentation included and FAE support during bring-up. Request a sample and we will confirm stock and lead time.

Technical Support | Firstack Expertise | BeiLuo

Guides, application notes, troubleshooting and reviews from BeiLuo's FAE team covering Firstack digital gate drivers, driver cores and driver solutions.

Guides 1 Application Notes 1 Troubleshooting 1 Reviews 1

How to Select a Firstack Gate Driver: A Practical Guide

2026-07-24 - Guides - By Liang Wei

Compare Firstack driver cores, plug-and-play drivers and driver solutions by module, drive power, isolation and protection to choose the right driver for your design.

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Firstack IGBT Gate Driver Design: Application Notes

2026-07-17 - Application Notes - By Liang Wei

Gate resistor selection, dead time, soft shutdown and active clamping for Firstack drivers in high-voltage IGBT converters, with practical design values.

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Firstack Gate Driver Troubleshooting: 7 Common Faults

2026-07-07 - Troubleshooting - By Chen Hao

Short-circuit trips, gate ringing, false turn-on, DC/DC faults and fault-sequencing problems in Firstack driver designs, with a systematic fault-finding procedure.

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Firstack SiC Gate Driver Review: Wide-Bandgap Modules

2026-06-30 - Reviews - By Zhao Min

A hands-on review of Firstack SiC-ready gate drivers for wide-bandgap modules, covering gate-loop layout, active clamping and protection for fast switching.

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Meet Our FAE Team

Liang Wei

Senior FAE Engineer, Gate Drive

Gate DriverIGBTProtection

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Chen Hao

FAE Engineer, Drivers and Topology

3-LevelFault HandlingMotor Drive

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Zhao Min

FAE Engineer, SiC and High Voltage

SiC MOSFETHigh VoltageEMC

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